• Sr. Software Engineer - High Level Synthesis

    Siemens Digital Industries SoftwareWilsonville, OR 97070

    Job #2603478190

  • Job Family: Research & Development

    Req ID: 383049

    Company: Siemens

    Job Title: Sr. Software Engineer - High Level Synthesis

    Job Reference #: 383049

    Job Location: Fremont, CA or Wilsonville, OR

    Siemens EDA is a global technology leader in electronic design automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics in order to deliver better products in the increasingly complex world of chip, board and system design.

    Siemens EDA is looking for a R&D lead who can understand, design, and implement LLM & AI/ML based solutions for high-level synthesis (HLS). The role is for Catapult HLS, an industry leader in HLS space, which takes ANSI C (~~~) /C++ (~~~) and SystemC (~~~) inputs and generates register transfer level (~~~) (RTL) code targeted for FPGAs (~~~) and ASICs (~~~) .

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    Catapult HLS tool is used by leading hardware design and systems companies for cutting edge semiconductor chip design in edge computing/automotive/machine learning/wireless design/video, image processing etc. We also work closely with academia and the tool is also used by top universities around the world in academic research to create state of the art edge computing/ML/AI chips.

    These are exciting times in our space - we are growing and working on ambitious new initiatives. We are looking for passionate engineers to be part of our LLM/AI/ML team.

    This team is expected to play a major role in developing several new capabilities in the Catapult HLS tool in future.

    Responsibilities

    • Find innovative ways to use LLMs (generative AI) to generate HLS-ready models for specific architectures and leverage LLM & AI/ML techniques to lead and improve upon current High-level synthesis and High-level verification solutions like PPA exploration and estimation, or orchestration of recipes for formal-based solutions.

    • Leverage infrastructure and learning developed from such initiatives to other products in CSD and Siemens EDA

    • Analyze and improve PPA for HLS-generated RTL by improving upon existing algorithms and developing new algorithms.

    • Participate in the specification, architecture, design, and development of features.

    • Work with customers, research partners and academia to drive future innovation-related initiatives.

    • Be a force for improving development processes and product quality.

    • Work effectively with globally distributed engineering teams and the Product Validation team

    Education and Experience:

    • PhD or post-doc in CS or ECE with research focus on EDA, preferably HLS or synthesis in general, and LLMs/AI/ML, or Masters with > 5 years of LLM/AI/ML & EDA industry experience

    • Deep understanding of numerical methods and sparse matrix techniques

    • Good knowledge of digital electrical circuits

    • Outstanding programming skills in C and C++, or Python, preferably on Linux platform

    • Proficiency in memory optimization, high-performance data structures and algorithms

    • Advanced multithreading programming experience.

    • Understanding of advanced computer architectures

    The Ideal Candidate should demonstrate:

    • Previous experience with product development or academic research in AI/ML applicable to EDA or digital design tools.

    • Solid background in object-oriented design and software engineering processes.

    • Strong analytical and problem-solving capabilities.

    • Ability to collaborate as part of globally distributed team

    • Fluency in English with strong interpersonal and excellent oral and written communication skills.

    Technical Skills (Desirable) :

    • Understanding of digital design for ASIC or FPGA. Hardware architecture and trade offs for digital arithmetic design.

    • Understanding of compiler optimizations.

    • Working knowledge of one or more HDL language and/or SystemC.

    • Python programming experience.

    • Prior background in applying LLMs/ML/AI in one or more areas like program analysis, EDA algorithms, compilers, DSE, PPA estimation, formal verification.

    General Skills: Strong positive attitude, Good presentation and communication skills, Self-driven and self-motivating, Able to implement technical solutions independently, Relationship building capabilities, Team player.

    The salary range for this position is $141,100 to $225,800 and this role is eligible to earn incentive compensation. The actual compensation offered is based on the successful candidate's work location as well as additional factors, including job-related skills, experience, and relevant education/training. Siemens offers a variety of health and wellness benefits to employees. Details regarding our benefits can be found here: ~~~ . In addition, this position is eligible for time off in accordance with Company policies, including paid sick leave, paid parental leave, PTO (for non-exempt employees) or non-accrued flexible vacation (for exempt employees).

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